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Contents Programming For PCI Device Overview Programmers Guide Scenario Access to PCI devices information How to work with PCI header Accessing PCI registers Accessing BAR0-BAR5 areas I/O Ports control Single read/write operations Data array read/write operations Accessing Physical Memory Addresses Memory Mapping Additional Functions Hardware interrupts handling at user level Common Issues Extended options of hardware interrupt handling PCI Support Routines And Structures Common Procedures OpenRapidPci IsRapidPciOpened CloseRapidPci GetHardwareConfiguration GetPciLocation PCI specific functions PCI Header GetPciHeader SetPciHeader ReadFromPci WriteToPci PCI BAR Areas GetNumOfPciBars GetPciBarLength GetPciBarPhysicalAddress GetPciBarLinearAddress ReadPciBarByte ReadPciBarWord ReadPciBarLong WritePciBarByte WritePciBarWord WritePciBarLong PCI Registers ReadPciCommandReg WritePciCommandReg ControlPciCommandRegBits ReadPciStatusReg Memory Access MapPhysToLinear UnmapMemory GetMem GetMemW GetMemL SetMem SetMemW SetMemL Direct Port I/O GetPortByte GetPortWord GetPortLong SetPortByte SetPortWord SetPortLong ReadPortBuffer WritePortBuffer Hardware Interrupts UnmaskPciIrq MaskPciIrq GetInterruptCounter		Accessing BAR0-BAR5 areas Go to RapidDriver Main Page The PCI configuration space contains an array of base address registers (BARs). Normal PCI devices have 6 base address registers, while PCI-PCI bridges have 2 and PCI-CardBus bridges have 1 (see PCI_COMMON_CONFIG structure). These registers are used to determine and allocate the type, amount and location of PCI I/O and PCI memory space that the device can use. RapidPci provides a set of functions to access these spaces: ReadPciBarByte - read a byte from the specified BAR + offset ReadPciBarWord- read a 16-bit word from the specified BAR + offset ReadPciBarLong - read a 32-bit double word from the specified BAR + offset WritePciBarByte - write a byte to the specified BAR + offset WritePciBarWord - write a 16-bit word to the specified BAR + offset WritePciBarLong - write a 32-bit double word to the specified BAR + offset Important note: These functions serves all requests by regardless if the base address is memory address or port I/O address.